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freescale semiconductor document number: mag3110 data sheet: technical data rev. 8, 05/2012 an energy efficient solution by freescale ? 2011-2012 freescale semiconducto r, inc. all ri ghts reserved. three-axis, digital magnetometer freescale?s mag3110 is a small, low-power, digital 3-axis magnetometer. the device can be used in conjunction with a 3-axis accelerometer to realize an orientation independent electronic compass that can provide accurate heading information. it features a standard i 2 c serial interface output and smart embedded functions. the mag3110 is capable of measuring magne tic fields with an output data rate (odr) up to 80 hz; these output data rates correspond to sample intervals from 12 ms to several seconds. the mag3110 is available in a plastic dfn package and it is guaranteed to operate over the extended temperature range of -40c to +85c. features ? 1.95v to 3.6v supply voltage (vdd) ? 1.62v to vdd io voltage (vddio) ? ultra small 2 mm by 2 mm by 0. 85 mm, 0.4 mm pitch, 10-pin package ? full-scale range 1000 t ? sensitivity of 0.10 t ? noise down to 0.25 t rms ? output data rates (odr) up to 80 hz ?i 2 c digital output interface (operates up to 400 khz fast mode) ?7-bit i 2 c address = 0x0e ? one-shot triggered measurem ent mode to conserve power ? rohs compliant applications ? electronic compass (ecompass) ? location-based services target market ? smart phones, tablets, personal navigation devices, robotics, uavs, speed sensing, current sensing and wrist watches with em bedded electronic compasses (ecompass) function. ordering information part number temperature range package description shipping mag3110fcr1 -40c to +85c dfn-10 tape and reel (1000) mag3110fcr2 -40c to +85c dfn-10 tape and reel (4000) 10-pin dfn 2 mm by 2 mm by 0.85 mm case 2154-01 mag3110 top and bottom view top view pin connections cap-a vdd nc cap-r gnd gnd int1 sda vddio scl 1 2 3 4 5 10 9 8 7 6 mag3110
sensors 2 freescale semiconductor, inc. related documentation the mag3110 device features and operatio ns are described in a variety of reference manuals, user guides, and application notes. to find the most-current versions of these documents: 1. go to the freescale homepage at: http://www.freescale.com/ 2. in the keyword search box at the top of the page, enter the device number mag3110. 3. in the refine your result pane on the left, click on the documentation link. contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 operating and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 i 2 c interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.5 i 2 c pullup resistor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 modes of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 i 2 c serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 register descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 sensor status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 device id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 user offset correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4 temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.5 control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 geomagnetic field maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 pcb guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.1 overview of soldering considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.2 halogen content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.3 pcb mounting recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
mag3110 sensors freescale semiconductor, inc. 3 1 block diagram and pin description figure 1. block diagram figure 2. pin connections and measurement coordinate system figure 3. device marking diagram digital signal sda scl processing and y-axis clock oscillator reference int1 x-axis z-axis mux adc control trim logic + regulator vdd vddio (top view) x y z 1 (top view) cap-a vdd nc cap-r gnd gnd int1 sda vddio scl 1 2 3 4 5 10 9 8 7 6 mag3110 mag lyw l = wafer lot y = last digit of year w = work week
sensors 4 freescale semiconductor, inc. 1.1 application circuit device power is supplied through the vdd line. power supply decoupl ing capacitors (100 nf ceramic) should be placed as near as possible to pins 1 and 2 of the device. additionally a 1 f (or larger) capacitor should be used for bulk decoupling of the vdd supply rail as shown in figure 4 . vddio supplies power for the digital i/o pins scl, sda, and int1. the control signals scl and sda, are not tolerant of voltages mo re than vddio + 0.3 volts. if vddio is removed, the control signals scl and sda will clamp any logic signals through their internal esd protection diodes. figure 4. electrical connection table 1. pin descriptions pin name function 1 cap-a bypass cap for internal regulator 2 vdd power supply, 1.95v ? 3.6v 3 nc do not connect. 4 cap-r magnetic reset pulse circ uit capacitor connection 5 gnd gnd 6 sda i 2 c serial data (8-bit i 2 c write address - 0x1c, read = 0x1d) 7 scl i 2 c serial clock 8 vddio digital interface supply, 1.65v - vdd 9 int1 interrupt - active high output 10 gnd gnd sda vddio 1 2 3 4 5 10 9 8 7 6 (top view) 100 nf 1 f vdd 100 nf 100 nf scl int1 4.7k 100 nf 4.7k cap-a vdd nc cap-r gnd gnd int1 sda vddio scl mag3110
mag3110 sensors freescale semiconductor, inc. 5 2 operating and electrical specifications 2.1 operating characteristics 2.2 absolute maximum ratings stresses above those listed as ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. table 2. operating characteristics @ vdd = 1.8 v, t = 25c unless otherwise noted. parameter test conditions symbol min typ max unit full scale range fs 1000 t output data range (1) 1. output data range is the sum of 10000 lsbs full-scale range, 10000 lsbs user defined offset (provided that ctrl_reg2[raw] = 0) and 10000 zero-flux offset. -30000 +30000 lsb sensitivity so 0.10 t/lsb sensitivity change vs. temperature tcs 0.1 %/c zero-flux offset accuracy 1000 t hysteresis (2) 2. hysteresis is measured by sw eeping the applied magnetic field from 0 t to 1000 t to 0 t and from 0 t to -1000 t to 0 t. 0.25 1 % non linearity best fit straight line (3) 3. best fit straight line 0 to 1000 t. nl -1 0.3 1 %fs magnetometer output noise os = 00 (4) 4. os = over sampling ratio. noise 0.4 t rms os = 01 0.35 os = 10 0.3 os = 11 0.25 operating temperature range t op -40 +85 c table 3. maximum ratings rating symbol value unit supply voltage vdd -0.3 to +3.6 v input voltage on any control pin (scl, sda) vin -0.3 to vddio + 0.3 v maximum applied magnetic field ? 100,000 t operating temperature range t op -40 to +85 c storage temperature range t stg -40 to +125 c table 4. esd and latchup protection characteristics rating symbol value unit human body model hbm 2000 v machine model mm 200 v charge device model cdm 500 v latchup current at t = 85c ? 100 ma this device is sensitive to mec hanical shock. improper handling can c ause permanent damage of the part or cause the part to otherwise fail. this device is sensitive to esd, improper handling can cause permanent damage to the part.
sensors 6 freescale semiconductor, inc. 2.3 electrical characteristics table 5. electrical characteristi cs @ vdd = 2.0v, vddio = 1.8v, t = 25c unless otherwise noted parameter test conditions symbol min typ max unit supply voltage vdd 1.95 2.4 3.6 v interface supply voltage vddio 1.62 vdd v supply current in active mode odr (1)(2) 80 hz, os (1) = 00 1. odr = output data rate; os = over sampling ratio. 2. please see table 30 for all odr and osr setting combinations, along with the corresponding current consumption and noise levels. i dd 900 a odr 40 hz, os (3) = 00 3. by design. 550 odr 20 hz, os (3) = 00 275 odr 10 hz, os (3) = 00 137.5 odr 5 hz, os (3) = 00 68.8 odr 2.5 hz, os (3) = 00 34.4 odr 1.25 hz, os (3) = 00 17.2 odr 0.63 hz, os = 00 8.6 supply current drain in standby mode measurement mode off i dd stby 2 a digital high level input voltage scl, sda vih 0.75*vddio v digital low level input voltage scl, sda vil 0.3* vddio v high level output voltage int1 i o = 500 a voh 0.9*vddio v low level output voltage int1 i o = 500 a vol 0.1* vddio v low level output voltage sda i o = 500 a vols 0.1* vddio v output data rate (odr) odr 0.8*odr odr 1.2 *odr hz signal bandwidth bw odr/2 hz boot time from power applied to boot complete bt 10 ms turn-on time (4)(5) 4. time to obtain valid data from standby mode to active mode. 5. in 80 hz mode odr. os = 1 t on 25 ms operating temperature range t op -40 +85 c
mag3110 sensors freescale semiconductor, inc. 7 2.4 i 2 c interface characteristics table 6. i 2 c slave timing values (1) 1. all values referred to vih (min) and vil (max) levels. parameter symbol i 2 c fast mode unit min max scl clock frequency pullup = 1 k , c b = 20 pf f scl 0 400 khz bus free time between stop and start condition t buf 1.3 s repeated start hold time t hd;sta 0.6 s repeated start setup time t su;sta 0.6 s stop condition setup time t su;sto 0.6 s sda data hold time (2) 2. t hd;dat is the data hold time that is measur ed from the falling edge of scl, applies to data in transmission and the acknowledge. t hd;dat 0.05 (3) 3. a device must internally provide a hold time of at least 300 ns for the sda signal (with respect to the vih (min) of the scl signal) to bridge the undefined region of the falling edge of scl. (4) 4. the maximum t hd;dat could be must be less than the maximum of t vd;dat or t vd;ack by a transition time. this device does not stretch the low period (t low ) of the scl signal. s sda valid time (5) 5. t vd;dat = time for data signal from scl low to sda out put (high or low, depending on which one is worse). t vd;dat 0.9 (4) s sda valid acknowledge time (6) 6. t vd;ack = time for acknowledgement signal from scl low to sd a output (high or low, depending on which one is worse). t vd;ack 0.9 (4) s sda setup time t su;dat 100 (7) 7. a fast mode i 2 c device can be used in a standard mode i 2 c system, but the requirement t su;dat 250 ns must then be met. this will automatically be the case if the device does not stretch the low period of the scl signal. if such a device does stretch the lo w period of the scl signal, it must output the next data bit to the sda line t r (max) + t su;dat = 1000 + 250 = 1250 ns (according to the standard mode i 2 c specification) before the scl line is released. al so the acknowledge timing must meet this setup time ns scl clock low time t low 1.3 s scl clock high time t high 0.6 s sda and scl rise time t r 20 + 0.1c b (8) 1000 ns sda and scl fall time (3) (8) (9) (10) 8. c b = total capacitance of one bus line in pf. 9. the maximum t f for the sda and scl bus lines is specified at 300 ns. the maximum fall time for the sda output stage t f is specified at 250 ns. this allows series protection resistors to be connected in between the sda and t he scl pins and the sda/scl bus lines without e xceeding the maximum specified t f . 10.in fast mode plus, fall time is specified the same for bot h output stage and bus timing. if series resistors are used, desig ners should allow for this when considering bus timing. t f 20 + 0.1c b (8) 300 ns pulse width of spikes on sda and scl that must be suppressed by input filter t sp 50 ns
sensors 8 freescale semiconductor, inc. figure 5. i 2 c slave timing diagram 2.5 i 2 c pullup resistor selection the scl and sda signals are driven by open-drain buffers and a pullup resistor is required to make the signals rise to the hig h state. the value of the pullup resistors depends on the system i 2 c clock rate and the capacitance load on the i 2 c bus. higher resistance value pullup re sistors consume less power, but have a slower t he rise time (due to the rc time constant between the bus capacitance and the pullup resistor) and will limit the i 2 c clock frequency. lower resistance value pullup resistors consume more power, but enable higher i 2 c clock operating frequencies. high bus capacitance is due to long bus lines or a high number of i 2 c devices connected to the bus. a lower value resistance pullup resistor is required in higher bus capacitance systems. for standard 100 khz clock i 2 c, pullup resistors typically are between 5k and 10 k . for a heavily loaded bus, the pullup resistor value may need to be reduced. for higher speed 400 khz or 800 khz clock i 2 c, bus capacitance will need to be kept low, in addition to selecting a lower value resistance pullup resistor . pullup resistors for high speed buses typically are about 1 k . in a well designed system with a micropr ocessor and one i 2 c device on the bus, with good board layout and routing, the i 2 c bus capacitance can be kept under 20 pf. with a 1k pullup resistor, the i 2 c clock rates can be well in excess of a few megahertz.
mag3110 sensors freescale semiconductor, inc. 9 3 modes of operation 4 functionality mag3110 is a small low-power, digital output, 3-axis linear m agnetometer packaged in a 10-pin dfn. the device contains a magnetic transducer for sensing and an asic for control and digital i 2 c communications. 4.1 i 2 c serial interface communication with the mag3110 takes place over an i 2 c bus. the mag3110 also has an interrupt signal indicating that new magnetic data readings are available. interrupt driven samp ling allows operation without the overhead of software polling. 4.2 factory calibration mag3110 is factory calibrated for sensitivity and temperature coefficient. all factory calibration coefficients are applied automatically by the mag3110 asic befo re the magnetic field readings are writ ten to registers 0x01 to 0x06 (see section 5). there is no need for the user to apply the calibration correction in the software and the calibration coefficients are not ther efore accessible to the user. the magnetic offset registers in addresses 0x09 to 0x0e are not a factory calibratio n offset but allow the user to define a har d- iron offset which can be automatically subtra cted from the magnetic field readings (see section 4.3.4 ). 4.3 digital interface there are two signals associated with the i 2 c bus: the serial clock line (scl) and the serial data line (sda). external pullup resistors (connected to vddio) are needed for sda and scl. when the bus is free, both lines are high. the i 2 c interface is compliant with fast mode (400 khz), and normal mode (100 khz) i 2 c standards. 4.3.1 general i 2 c operation there are two signals associated with the i 2 c bus: the serial clock line (scl) and the seri al data line (sda). the latter is a bidirectional line used for sending and receiving the data to/from the interface. external pullup resistors (connected to vddio ) are expected for both sda and scl. when the bus is free, both lines are high. a transaction on the bus is started through a start condition (s tart) signal. start condition is defined as a high to low transition on the data line while the scl line is held high. afte r start has been transmitted by the master, the bus is conside red busy. the next byte of data transmitted after start contains the slave address in the first 7 bits, and the eighth bit, the rea d/ write bit, indicates whether the master is receiving data from the slave or transmitting data to the save. when an address is s ent, each device in the system compares the first seven bits after a start condition with its own addre ss. if they match, the device considers itself addressed by the master. the 9th clock pulse, following the slave address byte (and each subsequent byte) is the acknowledge (ack). the transmitter must release the sda line during the ack peri od. the receiver must then pull the data line low so that it remains stable low during the high period of the acknowledge clock period. table 7. modes of operation description mode i 2 c bus state function description standby i 2 c communication is possible. only por and digital blocks are enabled. analog subsystem is disabled. active i 2 c communication is possibl e. all blocks are enabled (por, digital, analog). table 8. serial interface pin description pin name pin description vddio io voltage scl i 2 c serial clock sda i 2 c serial data int data ready interrupt pin
sensors 10 freescale semiconductor, inc. the number of bytes per transfer is unlim ited. if a receiver can?t receive another complete byte of data until it has performe d some other function, it can hold the clock line, scl low to force the transmitter in to a wait state. data transfer only continu es when the receiver is ready for another byte and releases the data line. this delay action is called clock stretching. not all receiv er devices support clock stretching. not all masters recognize clock stretching. this part uses clock stretching. the host i 2 c controller must support clock stretching for proper operation. a low to high transition on the sda line while the scl line t he scl line is high is defined as a stop condition (stop). a writ e or burst write is always terminated by the master issuing a stop. a master should properly terminate a read by not acknowledging a byte at the appropriate time in the protocol. a master may issue a repeated start during a transfer. the mag3110 i 2 c 7-bit device address is 0x0e. in i 2 c practice, the device address is shifted left by one bit field and a read/write bit is set in the lowest bit position. the i 2 c 8-bit write address is therefore 0x1c and the read address 0x1d. see figure 6 for details on how to perform read/write operations with mag3110. * data bytes outgoing * data bytes incoming figure 6. mag3110 i 2 c generic read/write operations 4.3.2 pullup the scl and sda signals are driven by open-drain buffers and a pull up resistor is required to make the signals rise to the high state. the value of the pullup resistors depends on the system i 2 c clock rate and the capacitance load on the i 2 c bus. higher resistance value pullup resistors consume less power, but will increase the rise time (due to the rc time constant betwe en the bus capacitance and the pullup resistor) and will limit the i 2 c clock frequency. lower resistance value pullup resistors consume more power, but enable higher i 2 c clock operating frequencies. i 2 c bus capacitance is the sum of the parasitic trace capacitance and input capacitance of the other devices present on the bus. devices connected to the bus. a lower value for the pullup resistor is required in higher capacitance bus systems to achieve a given operating frequency. for standard mode i 2 c at 100khz clock frequency, pullup resi stors typically are between 5k and 10 k . for a heavily loaded bus, the pullup resistor value may need to be reduced. for higher speed 400 khz or 800 khz clock i 2 c, bus capacitance will need to be kept low, in addition to selecting a lower value pullup resi stor. pullup resistors for high speed buses typically are about 1 k . in a well designed system with a micropr ocessor and one i 2 c device on the bus, with good board layout and routing, the i 2 c bus capacitance can be kept under 20 pf. with a 1k pullup resistor, the i 2 c clock rates can be well in excess of a few megahertz. 4.3.3 fast read mode when the fast read (fr) bit is set (ctrl_reg1, 0x10 , bit 2), the msb 8-bit data is read through the i 2 c bus. auto-increment is set to skip over the lsb data. when fr bit is cleared, t he complete 16-bit data is read accessing all 6 bytes sequentially (out_x_msb, out_x_lsb, out_y_msb, out_y_lsb, out_z_msb, out_z_lsb). 4.3.4 user offset corrections the 2?s complement user offset correction register values are us ed to compensate for correcting the x, y, and z-axis after devi ce board mount. these values may be used to compensate for hard-iron interference and zero -flux offset of the sensor. depending on the setting of the ctrl_reg2[raw] bit, the magnetic field sample data is corrected with the user offset values (ctrl_reg2[raw] = 0), or can be read out uncorrected for user offset values (ctrl_reg2[raw] = 1). the factory calibration for gain, offset and temperature compensa tion is always automatically applied irrespective of the setti ng of the ctrl_reg2[raw] bit which only controls whether the user offset correction values stored in the off_x/y/z registers are applied to the output data. in order to not saturate the sensor out put, user written offset values should be within the range o f 10,000 counts. single/burst-write operation i 2 c start i 2 c slave addr (r/w bit = 0) mag3110 register address to start write data0* data1 ? i 2 c stop single/burst-read operation i 2 c start i 2 c slave addr (r/w bit = 0) mag3110 register address to start read i 2 c repeated start i 2 c slave addr (r/w bit = 1) data0* data1 ? i 2 c stop
mag3110 sensors freescale semiconductor, inc. 11 4.3.5 int1 the dr_status register (see section 5.1.1 ) contains the zyxdr bit which denotes th e presence of new measurement data on one or more axes. software polling can be used to detect the trans ition of the zyxdr bit from 0 to 1 but, since the zyxdr bit i s also logically connected to the int1 pin, a more efficient approach is to use int1 to trigger a software interrupt when new measurement data is available as follows: 1. enable automatic resets by setting auto_mrs t_en bit in ctrl_reg2 (ctrl_reg2 = 0b1xxxxxx). 2. put mag3110 in active mode (ctrl_reg1 = 0bxxxxxx01). 3. idle until int1 goes high and activates an in terrupt service routine in the user software. 4. read magnetometer data as required from registers 0x01 to 0x06. int1 is cleared when register 0x01 out_x_msb is read and this register must therefore always be read in the interrupt service routine. 5. return to idle in step 3. 4.3.6 triggered measurements set the tm bit in ctrl_reg1 when you want the part to acquire only 1 sample on each axis. see table below for details. the anti-aliasing filter in the a/d converter has a finite delay before the output ?settles?. t he output data for the first odr period after getting out of standby mode is expec ted to be slightly off. this effect will be more pronounced for the lower over-sampli ng settings since with higher settings the error of the first acquis ition will be averaged over the total number of samples. there fore, it is not recommended to use trigger mode (ctrl_reg1[ac]=0, ct rl_reg1[tm]=1) measurement s for applications that require high accuracy, especially with low over-sampling settings. ac tm description 0 0 asic is in low power standby mode. 0 1 the asic will exit standby mode, perform one measurement cycle based on the programmed odr and osr setting, update the i 2 c data registers and re- enter standby mode. 1 0 the asic will perform continuous measurements based on the current osr and odr settings. 1 1 the asic will continue the current meas urement at the fastest applicable odr for the user programmed osr. the asic will return back to the programmed odr after completing the triggered measurement.
sensors 12 freescale semiconductor, inc. 4.3.7 mag3110 setup examples continuous measurements with odr = 80 hz, osr = 1 1. enable automatic magnetic sensor re sets by setting bit auto_mrst_en in ctrl_reg2. (ctrl_reg2 = 0x80) 2. put mag3110 in active mode 80 hz odr with osr = 1 by writing 0x01 to ctrl_reg1 (ctrl_reg1 = 0x01) 3. at this point it is possible to sync with mag3110 utilizi ng int1 pin or using polling of the dr_status register as explained in section 4.3.5 . continuous measurements with odr = 0.63 hz, osr = 2 1. enable automatic magnetic sensor re sets by setting bit auto_mrst_en in ctrl_reg2. (ctrl_reg2 = 0x80) 2. put mag3110 in active mode 0.63 hz odr with osr = 2 by writing 0xc9 to ctrl_reg1 (ctrl_reg1 = 0xc9) 3. at this point, it is possible to sync with mag3110 utiliz ing int1 pin or using polling of the dr_status register as explained in section 4.3.5 . triggered measurements with odr = 10 hz, osr = 8 1. enable automatic magnetic sensor re sets by setting bit auto_mrst_en in ctrl_reg2. (ctrl_reg2 = 0x80) 2. initiate a triggered measurem ent with osr = 128 by writing 0b0 0011010 to ctrl_reg1 (ctrl_reg1 = 0b00011010). 3. mag3110 will acquire the triggered meas urement and go back into standby mode. it is possible at this point to sync on int1 or resort to polling of dr_status register to read the acquired data out of mag3110. 4. go back to step 2 based on application needs.
mag3110 sensors freescale semiconductor, inc. 13 5 register descriptions table 9. register address map name type register address auto-increment address (fast read) (1) 1. fast read mode for quickly reading the most significant bytes (msb) of the sampled data. default value comment dr_status (2) 2. register contents are preserved when trans itioning from ?active? to ?standby? mode. r 0x00 0x01 0000 0000 data ready status per axis out_x_msb (2) r 0x01 0x02 (0x03) data bits [15:8] of x measurement out_x_lsb (2) r 0x02 0x03 data bits [7:0] of x measurement out_y_msb (2) r 0x03 0x04 (0x05) data bits [15:8] of y measurement out_y_lsb (2) r 0x04 0x05 data bits [7:0] of y measurement out_z_msb (2) r 0x05 0x06 (0x07) data bits [15:8] of z measurement out_z_lsb (2) r 0x06 0x07 data bits [7:0] of z measurement who_am_i (2) r 0x07 0x08 0xc4 device id number sysmod (2) r 0x08 0x09 data current system mode off_x_msb r/w 0x09 0x0a 0000 0000 bits [14:7] of user x offset off_x_lsb r/w 0x0a 0x0b 0000 0000 bits [6:0] of user x offset off_y_msb r/w 0x0b 0x0c 0000 0000 bits [14:7] of user y offset off_y_lsb r/w 0x0c 0x0d 0000 0000 bits [6:0] of user y offset off_z_msb r/w 0x0d 0x0e 0000 0000 bits [14:7] of user z offset off_z_lsb r/w 0x0e 0x0f 0000 0000 bits [6:0] of user z offset die_temp (2) r 0x0f 0x10 data temperature, signed 8 bits in c ctrl_reg1 (3) 3. modification of this register?s contents can only occur when devi ce is ?standby? mode, except the tm and ac bit fields in ctr l_reg1 register . r/w 0x10 0x11 0000 0000 operation modes ctrl_reg2 (3) r/w 0x11 0x12 0000 0000 operation modes
sensors 14 freescale semiconductor, inc. 5.1 sensor status 5.1.1 dr_status (0x00) data ready status this read-only status register provides the acquisition status information on a per-sample basis, and reflects real-time update s to the out_x, out_y, and out_z registers. zyxow is set to 1 whenever new data is acquired before completing t he retrieval of the previous set. this event occurs when the content of at least one data register (i.e. out_x, out_y, out_z) has been overwritten. zyxow is cleared when the high- bytes of the data (out_x_msb, out_y_msb, ou t_z_msb) of all active channels are read. zow is set to 1 whenever new z-axis acquisition is completed befo re the retrieval of the previous data. when this occurs the previous data is overwritten. zow is clea red any time out_z_m sb register is read. yow is set to 1 whenever new y-axis acquisition is completed before the retrieval of the previous data. when this occurs the previous data is overwritten. yow is cleared any time out_y_msb register is read. xow is set to 1 whenever new x-axis acquisition is completed befo re the retrieval of the previous data. when this occurs the previous data is overwritten. xow is cleared any time out_x_msb register is read. zyxdr signals that new acquisition for any of the enabled channels is available. zyxdr is cleare d when the high-bytes of the data (out_x_msb, out_y_msb, out_z_msb) of all the enabled channels are read. zdr is set to 1 whenever new z-axis data acquisition is comple ted. zdr is cleared any time out_z_msb register is read. ydr is set to 1 whenever new y-axis data acquisition is comple ted. ydr is cleared any time out_y_msb register is read. xdr is set to 1 whenever new x-axis data acquisition is completed. xdr is cleared any time out_x_msb register is read. table 10. dr_status register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 zyxow zow yow xow zyxdr zdr ydr xdr table 11. dr_status descriptions zyxow x, y, z-axis data overwrite. default value: 0. 0: no data overwrite has occurred. 1: previous x or y or z data was overwritten by new x or y or z data before it was completely read. zow z-axis data overwrite. default value: 0. 0: no data overwrite has occurred. 1: previous z-axis data was overwritt en by new z-axis data before it was read. yow y-axis data overwrite. default value: 0. 0: no data overwrite has occurred. 1: previous y-axis data was overwritten by new y-axis data before it was read. xow x-axis data overwrite. default value: 0 0: no data overwrite has occurred. 1: previous x-axis data was overwritten by new x-axis data before it was read. zyxdr x or y or z-axis new data ready. default value: 0. 0: no new set of data ready. 1: new set of data is ready. zdr z-axis new data available. default value: 0. 0: no new z-axis data is ready. 1: new z-axis data is ready. ydr z-axis new data available. default value: 0. 0: no new y-axis data is ready. 1: new y-axis data is ready. xdr z-axis new data available. default value: 0. 0: no new x-axis data is ready. 1: new x-axis data is ready.
mag3110 sensors freescale semiconductor, inc. 15 5.1.2 out_x_msb (0x01), out_x_lsb (0x02), out_y_msb (0x03), out_y_lsb (0x04), out_z_msb (0x05), out_z_lsb (0x06) x-axis, y-axis, and z-axis 16-bit output sa mple data of the magnetic field strength ex pressed as signed 2's complement numbers. when raw bit is set (ctrl_reg2[raw] = 1), the output range is between -20,000 to 20,000 bit counts (the combination of the 1000 t full scale range and the zero-flux offset ranging up to 1000 t). when raw bit is clear (ctrl_reg2[raw] = 0), the output range is between -30,000 to 30,000 bit counts when the user offset ranging between -10,000 to 10,000 bit counts are included the dr_status register, out_x_msb, out_x_lsb, out_y_msb, out_y_lsb, out_z_msb, and out_z_lsb are stored in the auto-incrementing address rang e of 0x00 to 0x06. data acquisit ion is a sequential read of 6 bytes. if the fast read (fr) bit is set in ctr l_reg1 (0x10), auto-increment will skip over lsb of the x, y, z sample registers. this w ill shorten the data acquisition from 6 bytes to 3 bytes. if the lsb registers are direct ly addressed, the lsb information can stil l be read regardless of fr bit setting. the preferred method for reading data regi sters is the burst-read method where the user application acquires data sequentially starting from register 0x01. if register 0x01 is not read first, the rest of the data registers (0x02 - 0x06) will not be updat ed with the most recent acquisition. it is still possible to address individual data registers, however register 0x01 must be read prior to ensure that the latest acquisition data is being read. table 12. out_x_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 xd15 xd14 xd13 xd12 xd11 xd10 xd9 xd8 table 13. out_x_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 xd7 xd6 xd5 xd4 xd3 xd2 xd1 xd0 table 14. out_y_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 yd15 yd14 yd13 yd12 yd11 yd10 yd9 yd8 table 15. out_y_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 yd7 yd6 yd5 yd4 yd3 yd2 yd1 yd0 table 16. out_z_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 zd15 zd14 zd13 zd12 zd11 zd10 zd9 zd8 table 17. out_z_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 z d 6z d 6z d 5z d 4z d 3z d 2z d 1z d 0
sensors 16 freescale semiconductor, inc. 5.2 device id 5.2.1 who_am_i (0x07) device identification register. this read-only register contains the device identifier which is se t to 0xc4. this value is fact ory programmed. consult factory for custom alternate values. 5.2.2 sysmod (0x08) the read-only system mode r egister indicates the current device operating mode. 5.3 user offset correction 5.3.1 off_x_msb (0x09), off_x_lsb (0x0a), off_y_msb (0x0b), off_y_lsb (0x0c), off_z_msb (0x0d), off_z_lsb (0x0e) these registers contain the x-axis, y-axis , and z-axis user defined offsets in 2' s complement format which are used when ctrl_reg2[raw] = 0 (see section 5.5.2 ) to correct for the mag3110 zero-flux of fset and for hard-iron offsets on the pcb caused by external components. the maximum range for the user of fsets is in the range -10,000 to 10,000 bit counts comprising the sum of the correction for the sensor zero-flux offset and the pcb hard-iron offset (range -1000 t to 1000 t or -10,000 to 10,000 bit counts). the user offsets are automatically added by the mag3110 logic when ctrl_reg2[raw] = 0 before the magnetic field readings are written to the data meas urement output registers out_x/y/z. the maximu m range of the x, y and z data measurement registers when ctrl_reg2[raw] = 0 is therefore -30,000 to 30,000 bit counts and is comp uted without clipping. the user offsets are not subtracted when ctrl_reg2[raw] = 1. the least signi ficant bit of the user defined x, y and z offsets is forced to be zero irrespective of the value written by the user. if the mag3110 zero-flux offset and pcb hard-iron offset corre ctions are performed by an external microprocessor (the most likely scenario) then the user offset registers can be i gnored and the ctrl_reg2[raw] bit should be set to 1. the user offset registers should not be confused with the factory calibration corrections which are not user accessible and are always applied to the measured magnetic data irrespective o the setting of ctrl_reg2[raw]. table 18. who_am_i register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 11000100 table 19. sysmod register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 000000 sysmod1 sysmod0 table 20. sysmod description sysmod system mode. default value: 00. 00: standby mode. 01: active mode, raw data. 10: active mode, non-raw user-corrected data. table 21. off_x_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 xd14 xd13 xd12 xd11 xd10 xd9 xd8 xd7 table 22. off_x_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 xd6 xd5 xd4 xd3 xd2 xd1 xd0 0 table 23. off_y_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 yd14 yd13 yd12 yd11 yd10 yd9 yd8 yd7
mag3110 sensors freescale semiconductor, inc. 17 5.4 temperature 5.4.1 die_temp (0x0f) the register contains the die temperature in c expressed as an 8-bit 2's complement number. the sensitivity of the temperature sensor is factory trimmed to 1c/lsb. the temperature sensor is not fact ory trimmed and must be calibrated by the user software if required. note: the register allows for temperature measurements from -128c to 127c but the output range is limited to -40c to 125c. 5.5 control registers 5.5.1 ctrl_reg1 (0x10) note: except for standby mode selection (bit 0, ac), the device must be in standby mode to change any of the fields within ctrl_reg1 (0x10). table 24. off_y_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 yd6 yd5 yd4 yd3 yd2 yd1 yd0 0 table 25. off_z_msb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 zd14 zd13 zd12 zd11 zd10 zd9 zd8 zd7 table 26. off_z_lsb register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 z d 6z d 5z d 4z d 3z d 2z d 1z d 0 0 table 27. temp register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 t7 t6 t5 t4 t3 t2 t1 t0 table 28. ctrl_reg1 register bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 dr2 dr1 dr0 os1 os0 fr tm ac table 29. ctrl_reg1 description dr[2:0] data rate selection. default value: 000. see table 30 for more information. os [1:0] this register configures the over sampli ng ratio or measurement integration time. default value: 00. see table 30 for more information. fr fast read selection. default value: 0. 0: the full 16-bit values are read. 1: fast read, 8-bit values read from the msb registers (auto-increment skips over the lsb register in burst-read mode). tm trigger immediate measurement. default value: 0 0: normal operation based on ac condition. 1: trigger measurement. if part is in active mode, any measurement in progress will continue with the highest odr possible for the selected osr. in standby mode triggered measurement will occur immediatel y and part will return to standby mode as soon as the measurement is complete. ac operating mode selection. note: see section 4.3.6 for details. default value: 0. 0: standby mode. 1: active mode. active mode will make periodic meas urements based on values programmed in the data rate (dr) and over sampling ratio bits (os).
sensors 18 freescale semiconductor, inc. table 30. over-sampling ratio and data rate description dr2 dr1 dr0 os1 os0 output rate (hz) over sample ratio adc rate (hz) current typ a noise typ t rms 0000080.0016 1280 900.0 0.4 0000140.0032 1280 900.0 0.35 0001020.0064 1280 900.0 0.3 0001110.00128 1280 900.0 0.25 0010040.0016640550.00.4 0010120.0032640550.00.35 0011010.0064640550.00.3 001115.00128640550.00.25 0100020.0016320275.00.4 0100110.0032320275.00.35 010105.0064320275.00.3 010112.50128320275.00.25 0110010.0016160137.50.4 011015.0032160137.50.35 011102.5064160137.50.3 011111.25128160137.50.25 100005.00168068.80.4 100012.50328068.80.35 100101.25648068.80.3 100110.631288068.80.25 101002.50168034.40.4 101011.25328034.40.35 101100.63648034.40.3 101110.311288034.40.25 110001.25168017.20.4 110010.63328017.20.35 110100.31648017.20.3 110110.161288017.20.25 111000.6316808.60.4 111010.3132808.60.35 111100.1664808.60.3 111110.08128808.60.25
mag3110 sensors freescale semiconductor, inc. 19 5.5.2 ctrl_reg2 (0x11) table 31. ctrl_reg2 register bit 7 bit 6 bit 5 bit 4 b it 3 bit 2 bit 1 bit 0 auto_mrst_en ? raw mag_rst ???? table 32. ctrl_reg2 description auto_mrst_en automatic magnetic sensor reset. default value: 0. 0: automatic magnetic sensor resets disabled. 1: automatic magnetic sensor resets enabled. similar to mag_rst, however, the resets occur automatically before each data acquisition. this bit is recommended to be always explicitly enabled by the host application. see examples in section 4.3.7 . this a write only bit and always reads back as 0. raw data output correction. default value: 0. 0: normal mode: data values are corrected by the user offset register values. 1: raw mode: data values are not corrected by the user offset register values. note: the factory calibration is always applied to the measured da ta stored in registers 0x01 to 0x06 irrespective of the setting of the raw bit. mag_rst magnetic sensor reset (one-shot). default value: 0. 0: reset cycle not active. 1: reset cycle initiate or reset cycle busy/active. when asserted, initiates a magnetic sensor reset cycle that will restore correct operation after exposure to an excessive magnetic field which exceeds the full scale range (see table 2 ) but is less than the maxi mum applied magnetic field (see table 3 ). when the cycle is finished, value returns to 0.
sensors 20 freescale semiconductor, inc. 6 geomagnetic field maps the magnitude of the geomagnet ic field varies from 25 t in south america to about 60 t over northern china. the horizontal component of the field varies from zero at the magnetic poles to 40 t. these web sites have further information: http://wdc.kugi.kyo to-u.ac.jp/igrf/ http://geomag.usgs.gov/
mag3110 sensors freescale semiconductor, inc. 21 geomagnetic field sensitivity full-scale range (0.1 t) (1000 t) mag3110 mag3110
sensors 22 freescale semiconductor, inc. 7 pcb guidelines surface mount printed circuit b oard (pcb) layout is a critical portion of the total design. the footprint for the surface mount packages must be the correct size to ensure proper solder co nnection interface between the pcb and the package. with the correct footprint, the packages will self-align when subjected to a solder reflow proce ss. these guidelines are for soldering a nd mounting the dual flat no-lead (dfn) package inertial sensors to pcbs. the purpose is to minimize the stress on the package after board mounting. the mag3110 digita l output magnetometers use the dfn pack age platform. this section describes suggested methods of soldering these devic es to the pcb for consumer applications. please see freescale application note an4247,?layout reco mmendation for pcbs using a magnetometer sensor? for a technical discussion on hard and soft-iron magnetic interfer ence and general guidelines on layo ut and component selection applicable to any pcb using a magnetometer sensor. freescale application note an1902, ?quad flat pack no-lead (qfn) micro dual flat pack no-lead ( dfn)? discusses the dfn package used by the mag3110, pcb design guidelines for using dfn packages and temperature profiles for reflow soldering. 7.1 overview of sold ering considerations information provided here is based on experiments executed on df n devices. they do not represent exact conditions present at a customer site. hence, information herein should be used as guidance only and process and design optimizations are recommended to develop an application specific solution. it shoul d be noted that with the proper pcb footprint and solder stenc il designs, the package will self-align during the solder reflow process. 7.2 halogen content this package is designed to be halogen free, exceeding most industry and customer standar ds. halogen free means that no homogeneous material within the assembly package shall contain ch lorine (cl) in excess of 700 ppm or 0.07% weight/weight or bromine (br) in excess of 900 ppm or 0.09% weight/weight. 7.3 pcb mounting recommendations 1. the pcb land should be designed as non solder mask defined (nsmd) as shown in figure 7 . 2. no additional via pattern underneath package. 3. pcb land pad is 0.6 mm by 0.225 mm as shown in figure 7 . 4. solder mask opening = pcb land pad edge + 0.125 mm larger all around = 0.725 mm by 1.950 mm 5. stencil opening = pcb land pad -0.05 mm smaller all around = 0.55 mm by 0.175 mm. 6. stencil thickness is 100 or 125 mm. 7. do not place any components or vias at a distance le ss than 2 mm from the package land area. this may cause additional package stress if it is too close to the package land area. 8. signal traces connected to pads are as symmetric as possi ble. put dummy traces on nc pads in order to have same length of exposed trace for all pads. 9. use a standard pick and place process and equipment. do not use a hand soldering process. 10. assemble pcb when in an enclosure. using caution, determi ne the position of screw down holes and any press fit. it is important that the assembled pcb remain flat after asse mbly to keep electronic operation of the device optimal. 11. the pcb should be rated for the multiple lead- free reflow condition with max 260c temperature. 12. no copper traces on top layer of pc b under the package. this will cause pla narity issues with board mount. freescale dfn sensors are compliant with restrictions on hazardou s substances (rohs), having halide free molding compound (green) and lead-free terminations. these terminations are comp atible with tin-lead (sn-pb) as well as tin-silver-copper (sn-ag-cu) solder paste soldering proce sses. reflow profiles applicable to thos e processes can be used successfully for soldering the devices.
mag3110 sensors freescale semiconductor, inc. 23 figure 7. footprints and soldering masks (dimensions in mm) 0.400 0.400 0.200 0.225 0.600 0.200 0.550 0.175 1.950 0.725 package footprint pcb cu footprint stencil opening solder mask opening
sensors 24 freescale semiconductor, inc. package dimensions case 2154-01 issue o 10-pin dfn
mag3110 sensors freescale semiconductor, inc. 25 package dimensions case 2154-01 issue o 10-pin dfn
sensors 26 freescale semiconductor, inc. package dimensions case 2154-01 issue o 10-pin dfn
mag3110 sensors freescale semiconductor, inc. 27 table 33. revision history revision number revision date description of changes 8 05/2012 ? updated content on page 1. ? updated pin descriptions in table 1. ? updated pin connection drawing and figure 2 to reflect horizontal bar for pin 1. ? added figure 3, device marking diagram ? updated output data range row in table 2. ? updated figure 4 to include pin names. ? updated bit 7 in table 31 and 32 for emphasis. changed description as highlighted in red and bold text.
mag3110 rev. 8 05/2012 information in this document is provided solely to enable system and software implementers to use freescale products. th ere are no express or implied copyright licenses granted hereunder to design or fabr icate any integrated circuits based on the information in this document. freescale reserves the right to make changes without further notice to any products herein. freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does freescale assume any liability arising out of the applic ation or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. all operating parameters, including ?typicals,? must be validated for each customer application by customer?s technical experts. freescale does not convey any license under its patent rights nor the rights of others. freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: http://www.reg.net/ v2/webservices/freescale/docs/termsandconditions.htm . freescale, the freescale logo, and the energy efficient solutions logo are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. all other product or service names are t he property of their respective owners. ? 2012 freescale semiconductor, inc. all rights reserved. how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support rohs-compliant and/or pb-free versions of freescale products have the functi onality and electrical characteristics of their non-rohs-compliant and/or non-pb-free counterparts. for further information, see http:/www.freescale.com or contact your freescale sales representative. for information on freescale?s environmental products program, go to http://www.freescale.com/epp .

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